1. Field of the Invention
The present invention relates to the basic input output systems ("BIOS") of a personal computer system, and more specifically to the timer mechanism associated with the BIOS.
2. Art Background
The BIOS of a personal computer system, like most firmware, must provide time delays of minimum and/or maximum values when communicating with certain hardware devices. An example of a device which needs accurate delays is the floppy disk controller of a personal computer system. In prior computer systems, the time delays were accomplished by software timing loops, where a series of harmless instructions were executed a predetermined number of times. This was quite satisfactory to the prior art computer systems because the length of time required to complete each instruction, and hence the series of the instructions, could be calculated based on the CPU ("Central Processing Unit") and the speed at which it was operating. Each time a new CPU was installed or the speed was increased, new calculations were done and the resulting values were incorporated into the timing loops.
Two developments have occurred to make software timing loops less accurate and less desirable. First, CPUs have become more complex with the addition of instruction pre-fetch queues, and second, the more extensive use of cache memory, both internal and external, in today's computers. A given set of instructions may or may not repeatedly execute at the same speed depending on such factors as whether they all fit into the pre-fetch queue, whether they are always fetched from the cache memory, whether the CPU is always running at the same speed and whether the interrupts or pre-fetch cycles are occurring within the loops.
An even more complex situation arises with modular architecture of today's technology. Modular architecture is a design where a variety of CPU modules, containing different CPUs (some with and some without cache memories), and running at vastly differing speeds, can be inserted into a main logic board containing the BIOS. Software timing loops for such a BIOS would need to be extremely intelligent and recalculate each time one of the parameters affecting its speed is altered. Such a solution is undesirable because of the space such code would consume and the time required to do the many recalculations.
Therefore, a hardware timer becomes a desirable feature, given the above considerations. Some hardware timers do exist on the computers, but they can be taken over by operating systems and some application programs due to their non-dedicated nature to the BIOS. Further, they do not achieve the timing resolutions needed by the BIOS.
As will be described in the following description, the dedicated BIOS hardware timer described herein meets the need described above without any of the problems inherent in software timing loops.